ENHANCING PROCESS EFFICIENCY AND COST SAVING IN BAG-AND-SEAL PROCESS USING A DMAIC APPROACH: A CASE STUDY IN SEMICONDUCTOR MANUFACTURING FACTORY
Ho Chi Minh City University of Technology (HCMUT), 268 Ly Thuong Kiet Street, Dien Hong Ward; Vietnam National University Ho Chi Minh City (VNU-HCM), Linh Xuan Ward, Ho Chi Minh City, Vietnam.
* Corresponding Author
ORCID Details
Ngoc Hien Do: https://orcid.org/0000-0001-9322-3518
Research Article
International Journal of Scholarly Research in Engineering and Technology, 2026, 08(01), 048–057.
Article DOI: 10.56781/ijsret.2026.8.1.0023
Publication history:
Received on 15 August 2026; revised on 20 September 2026; accepted on 22 September 2026
Abstract:
The Bag and Seal (BNS) process protects moisture-sensitive substrates before chip attach. In the current method, substrates are moved from liquid crystal polymer (LCP) tray to thermal form tray (TFT) for sealing and then returned to LCP trays, which requires ACL tools and leads to TFT deformation, long cycle time, and scrap cost. This study would examine whether BNS could be done directly on LCP trays to remove these transfer steps. Using a DMAIC approach with design of experiment (DOE) testing, inventory review, quality checks, and routing updates, LCP trays were shown to be stable with no out-of-pocket events. The new process would reduce handling time from 45 minutes to 5 minutes per lot, eliminates USD 42,142 in yearly TFT scrap, and removes ACL tool usage. The updated routes improve responsiveness and lower operational workload while still meeting moisture exposure time (MET0) limits and protecting substrate quality. Overall, LCP tray BNS is a simpler, cost-saving, and scalable method for substrate preparation.
Keywords:
DMAIC, LCP tray, Semiconductor manufacturing optimization, Cost saving, Process efficiency
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Copyright © 2026 Author(s) retain the copyright of this article. This article is published under the terms of the Creative Commons Attribution Liscense 4.0